How to Guide the Compiler to Speed up Your Code | by Minhaz | Apr, 2022

Picture by Daniil Sitantev on Unsplash.

Fashionable compilers don’t simply compile our code, as is from a sure high-level language to meeting language (or machine-readable directions). They spend a substantial amount of effort and time optimizing our code to realize the perfect efficiency.

That is after all enabled when the precise flags are offered to the compilers. You may at all times instruct the compilers to optimize for binary dimension or compilation latency as an alternative (read more).

This text will probably be centered on optimising runtime efficiency.


A lot of the examples on this article are utilizing C++, however I consider the content material can be helpful for everybody.

The content material of this text will not be reflection of the organisation I work for however as an alternative my very own.

Picture by Francesco Vantini on Unsplash.

Let’t discuss somewhat about fashionable CPUs. That is usually taught at college however we are inclined to neglect it.


SISD stands for Single Instruction Stream, Single Information Stream. Usually, a program’s code is executed in sequence, i.e. one after one other. Let’s say we’ve got two arrays say a and b, and we wish to write a program that converts every factor in a with the next operation:

a[i] = a[i] + b[i];

For every index i within the arrays.

Visualisation of swap algorithm would work on a SISD CPU. Supply: Open supply repository on Github — Wunkolo/qreverse (MIT license).

That is how we frequently visualize how our code is executed on the CPUs. And we are inclined to optimize the massive Omega — and sure that’s the proper apply.

However fashionable CPUs can do higher!

Fashionable CPUs have capabilities and help for SIMD which stands for Single Instruction, A number of Information. Such machines can exhibit data-level parallelism (which is completely different from concurrency). They will carry out the identical instruction on a number of information directly.

For the above instance, the SIMD CPUs may group and execute the operations in a single batch as:

a[0] = a[0] + b[0];
a[1] = a[1] + b[1];
a[2] = a[2] + b[2];
a[3] = a[3] + b[3];

SIMD instruction for + known as addps in SSE or vaddps in AVX, they usually help grouping of 4 components and eight components respectively (integer sort).

Visualisation of swap algorithm would work on a SIMD CPU. Supply: Open supply repository on Github — Wunkolo/qreverse (MIT license).

You see how your code would simply run Okay instances sooner if you happen to may inform the CPU to run the algorithm on this method?

Fear not! You may — there are intrinsics that assist you to inform the machines to do vector operations (SIMD) as an alternative of a scalar.

Here’s a code instance

Code instance to compute sum of two arrays into `goal` array utilizing Neon Intrinsics.

Inform me who doesn’t wish to write code this manner — seems completely beautiful!

Okay, I don’t!

This requires buying a bit extra area data and is commonly not simply maintainable. There’s a approach to write each maintainable in addition to high-performance code — however that may be a subject for one more night (will replace right here)!

The nice factor is, usually you don’t have to jot down code with vector intrinsics immediately to realize the efficiency targets. This takes me to the following subject — “vectorization”.


SIMD helps directions that may function on vector information sorts. Within the above instance a gaggle of array components like a[0...3] or b[4...7] could be referred to as vectors.

Vectorization is using vector directions to hurry up program execution.

Vectorization could be carried out each by programmers — by explicitly writing vector directions in addition to by the compiler immediately. The latter case known as Auto Vectorization.

Auto Vectorization could be carried out by Forward of Time (AOT) compilers at compile time or by Simply in Time (JIT) compiler at execution time.

Loop unrolling

Loop unrolling or Loop unwrapping is a loop transformation approach that makes an attempt to optimize this system’s execution pace at expense of its binary dimension.

The aim of the loop unrolling is to extend a program’s pace by lowering or eliminating directions that management the loop resembling pointer arithmetic and finish of loop check on every iteration.

A easy instance of loop unrolling can be:

Loop unrolling — unrolled loops look unhealthy proper? They’re usually good for higher efficiency!

Within the later a part of this text, I’ll share some efficiency numbers round these two.

gcc on Mac — Picture by the Creator.

Fashionable C++ compilers have code optimization strategies like loop vectorizer which permits them to generate vector directions for code written in scalar format.

So usually our scalar codes are literally being run as vector directions within the CPUs already! Phewww!

Nonetheless, it depends upon how the code is written — for the compiler to know if it may possibly auto-vectorizethe code or not. Typically, the compiler can’t decide if it’s secure to vectorize a sure loop or not. Identical goes for loop unrolling.

However, fear not! There are methods to information your compiler that it’s secure to compile with these optimizations.

The strategies under shall work for a sure group of compilers that may generate Neon code (learn extra under) like GCC, LLVM-clang (Utilized in Android NDK), and Arm C/C++ Compiler.

For demonstration, I’ll use the issue assertion of — changing a picture in YUV picture format to ARGB picture format. For evaluating efficiency I shall use Pixel 4a (an Android system).

Code instance:

Code instance to transform YUV picture to ARGB. The algorithm by default iterate over each pixel on the picture in row-major method.

On the Pixel 4a system, for an 8 MP picture (3264x2448 = ~8 million pixels) — working the code above, I bought the next quantity as common runtime latency.

Common latency of working the code above on Pixel 4A for 8MP picture.

It’s helpful to notice that, the compiler is already attempting to optimize the code. It was run with -O3 compilation flag (i.e. optimized for pace over binary dimension or compilation time). Auto-vectorization is enabled for this flag.

Pragma declaration — loop vectorize

Utilizing following #pragma declaration simply earlier than the for loop signifies to the compiler that the next loop comprises no information dependencies that ought to stop auto-vectorization:

#pragma clang loop vectorize(assume_safety)

Essential notice: Be sure that you solely use this pragma when it’s secure to take action it may in any other case result in race situations.

So if we match it into the instance above like this

Instance of add #pragma directive on high of your loop

We get the next common latency numbers:

11.4% speedup by including this single line directive on high of your loop.

Pragma declaration — loop unroll

Equally, we will instruct the compiler to unroll loops when compiling with the next assertion:

#pragma clang loop unroll_count(2)

So if we match it into the instance above like this

Instance of add #pragma directives at completely different phases of the for loop.

We get the next common latency numbers:

18.5% speedup by including each loop vectorise and loop unroll directives (2 extra strains of code).

The integer in unroll_count(N) principally guides the compiler on how a lot to unroll — you may benchmark with completely different numbers to determine the perfect one.

General 18+% pace up for this instance with 2 strains of code and fewer than 1 hour of effort! The ensuing code is simple to learn and preserve.

Another ideas:

  1. Choose utilizing < to assemble loops as in comparison with <= or !=.
  2. Utilizing the -ffast-math possibility can considerably enhance the efficiency of generated code, so far as the algorithm is tolerant to potential inaccuracies because it breaks compliance with IEEE and ISO requirements for math operations.


You may get significant full speedup in your code by utilizing these directives which information the compilers to optimize the code higher.

Within the instance used I used to be in a position to get roughly 18%+ speedup with 2 extra strains of code and the code is way simpler to learn and preserve than one with vector syntax immediately.

The ultimate speedup with this method depends upon how impartial the info is with respect to the algorithm.

The easiest way is at all times to try to benchmark. The efficiency enhance (if any) would positively be definitely worth the engineering time price.

I plan to jot down extra about methods to realize improved efficiency with out sacrificing the maintainability of the code. A variety of these are derived from issues I discovered at Google and my interest tasks.

On this part, I’m going to explain somewhat extra on among the unexplained ideas.


Not our noble gasoline buddy! Neon is the implementation of Arm’s Superior SIMD structure. The aim of Neon is to speed up information manipulation by offering:

  1. Thirty-two 128-bit vector registers, every able to containing a number of lanes of knowledge.
  2. SIMD directions to function concurrently on these a number of lanes of knowledge.


Per documentation there are a number of methods to utilize the know-how:

  1. Utilizing Neon-enabled open supply libraries. All of us love this!
  2. Auto-vectorization function within the compilers that may reap the benefits of Neon.
  3. Utilizing Neon intrinsics — the compiler will change them with applicable Neon directions. This offers us direct low-level entry to the precise Neon instruction we wish from C/C++ code.
  4. Writing meeting code with Neon immediately, solely works for actually well-experienced programmers.
  1. What is Neon?
  2. Coding best practices for auto-vectorization

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